On-chip communication architectures : system on chip interconnect

Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-ch...

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Bibliographic Details
Main Author: Pasricha, Sudeep.
Other Authors: Dutt, Nikil.
Format: eBook
Language: English
Published: Amsterdam ; Boston : Elsevier / Morgan Kaufmann Publishers, ©2008.
Series: Morgan Kaufmann series in systems on silicon.
Subjects:
Systems on a chip.
Microcomputers > Buses.
Computer architecture.
Interconnects (Integrated circuit technology)
elektronické knihy
electronic books
ISBN: 9780123738929
012373892X
9780080558288
0080558283
1281370940
9781281370945
9786611370947
6611370943
Physical Description: 1 online resource (xvii, 522 pages) : illustrations

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Table of contents

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020 |a 9780123738929 
020 |a 012373892X 
020 |a 9780080558288  |q (electronic bk.) 
020 |a 0080558283  |q (electronic bk.) 
020 |a 1281370940 
020 |a 9781281370945 
020 |a 9786611370947 
020 |a 6611370943 
035 |a (OCoLC)228148474  |z (OCoLC)247359396  |z (OCoLC)435501529  |z (OCoLC)646750814  |z (OCoLC)712978532  |z (OCoLC)772078383  |z (OCoLC)994685819  |z (OCoLC)1044565314  |z (OCoLC)1056388022  |z (OCoLC)1063974876  |z (OCoLC)1075546064  |z (OCoLC)1103262601  |z (OCoLC)1129378233  |z (OCoLC)1153023900  |z (OCoLC)1162262657  |z (OCoLC)1192349480  |z (OCoLC)1240512363 
100 1 |a Pasricha, Sudeep. 
245 1 0 |a On-chip communication architectures :  |b system on chip interconnect /  |c Sudeep Pasricha, Nikil Dutt. 
260 |a Amsterdam ;  |a Boston :  |b Elsevier / Morgan Kaufmann Publishers,  |c ©2008. 
300 |a 1 online resource (xvii, 522 pages) :  |b illustrations 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
490 1 |a Systems on Silicon 
506 |a Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty 
520 |a Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R & D efforts and dollars are increasingly focused on communication architecture design. This book is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures. KEY FEATURES * A definitive guide to on-chip communication architectures, explaining key concepts, surveying research efforts and predicting future trends * Detailed analysis of all popular standards for on-chip communication architectures * Comprehensive survey of all research on communication architectures, covering a wide range of topics relevant to this area, spanning the past several years, and up to date with the most current research efforts * Future trends that with have a significant impact on research and design of communication architectures over the next several years. 
505 0 |a An Overview of System-on-Chips; Need for Communication-centric Design Flow; Basic Concepts of Bus-based Communication Architectures; Bus-based Communication Architecture Specification Standards; Limitations of Current Design Approaches; Physical and Electrical Analysis; Models for Performance Exploration; Power/Energy Exploration; Design and Synthesis of Communication Architectures; Innovative Aspects; Dynamic Bus Reconfiguration; Bus Encoding Techniques; Interface Synthesis and Optimization; Secure On-chip Communication Infrastructure; Verification; Custom Bus Design; Open Problems; Network-on-Chips; Optical Interconnects; Wireless Interconnects; Physical Design Trends. 
504 |a Includes bibliographical references and index. 
590 |a Knovel  |b Knovel (All titles) 
650 0 |a Systems on a chip. 
650 0 |a Microcomputers  |x Buses. 
650 0 |a Computer architecture. 
650 0 |a Interconnects (Integrated circuit technology) 
655 7 |a elektronické knihy  |7 fd186907  |2 czenas 
655 9 |a electronic books  |2 eczenas 
700 1 |a Dutt, Nikil. 
776 0 8 |i Print version:  |a Pasricha, Sudeep.  |t On-chip communication architectures.  |d Amsterdam ; Boston : Elsevier / Morgan Kaufmann Publishers, ©2008  |z 9780123738929  |z 012373892X  |w (DLC) 2008004691  |w (OCoLC)176924796 
830 0 |a Morgan Kaufmann series in systems on silicon. 
856 4 0 |u https://proxy.k.utb.cz/login?url=https://app.knovel.com/hotlink/toc/id:kpOCCASCI3/on-chip-communication?kpromoter=marc  |y Full text 

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