Digital systems : from logic gates to processors

• Main Authors: Deschamps, Jean-Pierre, 1945- (Author), Valderrama, Elena (Author), Terés, Lluís (Author)
• Format: Electronic eBook
• Language: English
• Published: Switzerland : Springer, [2016]
• Subjects: Digital electronics.; Logic devices.; elektronické knihy; electronic books
• ISBN: 9783319411989; 9783319411972
• Physical Description: 1 online resource (xv, 241 pages) : illustrations (some color)

This textbook for a one-semester course in Digital Systems Design describes the basic methods used to develop "traditional" Digital Systems, based on the use of logic gates and flip flops, as well as more advanced techniques that enable the design of very large circuits, based on Hardware...

Table of Contents:

• Intro; Preface; Overview; Acknowledgments; Contents; About the Authors; 1: Digital Systems; 1.1 Definition; 1.2 Description Methods; 1.2.1 Functional Description; 1.2.2 Structural Description; 1.2.3 Hierarchical Description; 1.3 Digital Electronic Systems; 1.3.1 Real System Structure; 1.3.2 Electronic Components; 1.3.2.1 Binary Codification; 1.3.2.2 MOS Transistors; 1.3.2.3 CMOS Inverter; 1.3.2.4 Other Components; 1.3.3 Synthesis of Digital Electronic Systems; 1.4 Exercises; References; 2: Combinational Circuits; 2.1 Definitions; 2.2 Synthesis from a Table; 2.3 Boolean Algebra
• 2.3.1 Definition2.3.2 Some Additional Properties; 2.3.3 Boolean Functions and Truth Tables; 2.3.4 Example; 2.4 Logic Gates; 2.4.1 NAND and NOR; 2.4.2 XOR and XNOR; 2.4.3 Tristate Buffers and Tristate Inverters; 2.5 Synthesis Tools; 2.5.1 Redundant Terms; 2.5.2 Cube Representation; 2.5.3 Adjacency; 2.5.4 Karnaugh Map; 2.6 Propagation Time; 2.7 Other Logic Blocks; 2.7.1 Multiplexers; 2.7.2 Multiplexers and Memory Blocks; 2.7.3 Planes; 2.7.4 Address Decoder and Tristate Buffers; 2.8 Programming Language Structures; 2.8.1 If Then Else; 2.8.2 Case; 2.8.3 Loops; 2.8.4 Procedure Calls
• 2.8.5 Conclusion2.9 Exercises; References; 3: Arithmetic Blocks; 3.1 Binary Adder; 3.2 Binary Subtractor; 3.3 Binary Adder/Subtractor; 3.4 Binary Multiplier; 3.5 Binary Divider; 3.6 Exercises; References; 4: Sequential Circuits; 4.1 Introductory Example; 4.2 Definition; 4.3 Explicit Functional Description; 4.3.1 State Transition Graph; 4.3.2 Example of Explicit Description Generation; 4.3.3 Next State Table and Output Table; 4.4 Bistable Components; 4.4.1 1-Bit Memory; 4.4.2 Latches and Flip-Flops; 4.5 Synthesis Method; 4.6 Sequential Components; 4.6.1 Registers; 4.6.2 Counters
• 4.6.3 Memories4.6.3.1 Types of Memories; 4.6.3.2 Random Access Memories; 4.6.3.3 Read-Only Memories; 4.6.3.4 Reprogrammable ROM; 4.6.3.5 Example of Memory Bank; 4.7 Sequential Implementation of Algorithms; 4.7.1 A First Example; 4.7.2 Combinational vs. Sequential Implementation; 4.8 Finite-State Machines; 4.8.1 Definition; 4.8.2 VHDL Model; 4.9 Examples of Finite-State Machines; 4.9.1 Programmable Timer; 4.9.2 Sequence Recognition; 4.10 Exercises; References; 5: Synthesis of a Processor; 5.1 Definition; 5.1.1 Specification; 5.1.2 Design Strategy; 5.2 Functional Specification
• 5.2.1 Instruction Types5.2.2 Specification; 5.3 Structural Specification; 5.3.1 Block Diagram; 5.3.2 Component Specification; 5.3.2.1 Input Selection; 5.3.2.2 Output Selection; 5.3.2.3 Register Bank; 5.3.2.4 Computation Resources; 5.3.2.5 Go To; 5.4 Component Implementation; 5.4.1 Input Selection Component; 5.4.2 Computation Resources; 5.4.3 Output Selection; 5.4.4 Register Bank; 5.4.5 Go To Component; 5.5 Complete Processor; 5.5.1 Instruction Encoding; 5.5.2 Instruction Decoder; 5.5.2.1 Input Selection Component; 5.5.2.2 Computation Resources; 5.5.2.3 Output Selection Component