rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Designing with Xilinx FPGAs
    sub title: using Vivado
  name:
    name part: Churiwala, Sanjay
    role:
      role term: editor.
  type of resource: text
  genre: bibliography
  genre: elektronické knihy
  genre: electronic books
  origin info:
    place:
      place term: sz
    date issued: 2017
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: remote
    extent: 1 online resource (x, 260 pages)
  abstract: This book helps readers to implement their designs on Xilinx® FPGAs. The authors demonstrate how to get the greatest impact from using the Vivado® Design Suite, which delivers a SoC-strength, IP-centric and system-centric, next generation development environment that has been built from the ground up to address the productivity bottlenecks in system-level integration and implementation. This book is a hands-on guide for both users who are new to FPGA designs, as well as those currently using the legacy Xilinx tool set (ISE) but are now moving to Vivado. Throughout the presentation, the authors focus on key concepts, major mechanisms for design entry, and methods to realize the most efficient implementation of the target design, with the least number of iterations.
  table of contents: State of the Art Programmable Logic -- Vivado Design Tools -- IP Flows -- Gigabit Transceivers -- Memory Controllers -- Processor Options -- Vivado IP Integrator -- SysGen for DSP -- Synthesis -- C Based Design -- Simulation -- Clocking -- Stacked Silicon Interconnect -- Timing Closure -- Power Analysis and Optimization -- System Monitor -- Hardware Debug -- Emulation Using FPGAs -- Partial Reconfiguration & Hierarchical Design.
  note: Sanjay Churiwala, editor.
  note: Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty
  note: Includes bibliographical references (pages 251-253).
  subject:
    title info:
      title: Vivado Design Suite
  subject:
    topic: Field programmable gate arrays
  subject:
    topic: Computer-aided design
  related item:
    title info:
      title: Designing With Xilinx Fpgas
    origin info:
      publisher: [Place of publication not identified] : Springer Verlag 2016
    identifier: (OCoLC)952384094
  identifier: 9783319424385
  identifier: 9783319424378
  identifier: https://proxy.k.utb.cz/login
  access condition: Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty
  record info:
    record content source: N$T
    record creation date: 161024
    record change date: 20251008111951.0
    record identifier: 99472
    language of cataloging:
      language term: eng