Analog integrated circuit design automation : placement, routing and parasitic extraction techniques
This book introduces readers to a variety of tools for analog layout design automation. After discussing the placement and routing problem in electronic design automation (EDA), the authors overview a variety of automatic layout generation tools, as well as the most recent advances in analog layout-...
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Main Authors: | , , |
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Format: | eBook |
Language: | English |
Published: |
Switzerland :
Springer,
[2016]
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Subjects: | |
ISBN: | 9783319340609 9783319340593 |
Physical Description: | 1 online resource (xvi, 207 pages) : illustrations (some color) |
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100 | 1 | |a Martins, Ricardo |q (Ferreira Martins), |e author. | |
245 | 1 | 0 | |a Analog integrated circuit design automation : |b placement, routing and parasitic extraction techniques / |c Ricardo Martins, Nuno Lourenço, Nuno Horta. |
264 | 1 | |a Switzerland : |b Springer, |c [2016] | |
264 | 4 | |c ©2017 | |
300 | |a 1 online resource (xvi, 207 pages) : |b illustrations (some color) | ||
336 | |a text |b txt |2 rdacontent | ||
337 | |a počítač |b c |2 rdamedia | ||
338 | |a online zdroj |b cr |2 rdacarrier | ||
504 | |a Includes bibliographical references and index. | ||
506 | |a Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty | ||
520 | |a This book introduces readers to a variety of tools for analog layout design automation. After discussing the placement and routing problem in electronic design automation (EDA), the authors overview a variety of automatic layout generation tools, as well as the most recent advances in analog layout-aware circuit sizing. The discussion includes different methods for automatic placement (a template-based Placer and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. All the methods described are applied to practical examples for a 130nm design process, as well as placement and routing benchmark sets. Introduces readers to hierarchical combination of Pareto fronts of placements; Presents electromigration-aware routing with multilayer multiport terminal structures; Includes evolutionary multi-objective multi-constraint detailed Router; Enables parasitic extraction performed over a semi-complete layout.- Resumé vydavatel | ||
590 | |a SpringerLink |b Springer Complete eBooks | ||
650 | 0 | 7 | |a analogové integrované obvody |2 czenas |7 ph114035 |
650 | 0 | 7 | |a mikroelektronika |2 czenas |7 ph122849 |
650 | 0 | 7 | |a mikroprocesory |2 czenas |7 ph115311 |
650 | 0 | 7 | |a elektronika |2 czenas |7 ph114454 |
650 | 0 | 9 | |a analog integrated circuits |2 eczenas |
650 | 0 | 9 | |a microelectronics |2 eczenas |
650 | 0 | 9 | |a microprocessors |2 eczenas |
650 | 0 | 9 | |a electronics |2 eczenas |
655 | 7 | |a elektronické knihy |7 fd186907 |2 czenas | |
655 | 7 | |a monografie |7 fd132842 |2 czenas | |
655 | 9 | |a electronic books |2 eczenas | |
655 | 9 | |a monographs |2 eczenas | |
700 | 1 | |a Lourenço, Nuno, |e author. | |
700 | 1 | |a Horta, Nuno C. G., |e author. | |
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