Design and test technology for dependable systems-on-chip
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| Corporate Author | |
|---|---|
| Other Authors | , , |
| Format | eBook |
| Language | English |
| Published |
Hershey, Pa. :
IGI Global (701 E. Chocolate Avenue, Hershey, Pennsylvania, 17033, USA),
c2011.
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| Subjects | |
| Online Access | Full text |
| ISBN | 9781609602147 9781609602123 |
| Physical Description | 1 online zdroj (1 v.) Also available in print. |
Cover
| Abstract: | Covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC). |
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| Bibliography: | Includes bibliographical references. |
| ISBN: | 9781609602147 9781609602123 |
| Access: | Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty univerzity |
| Physical Description: | 1 online zdroj (1 v.) Also available in print. |