VLSI test principles and architectures design for testability

• Other Authors: Wang, Laung-Terng, (Editor), Wu, Cheng-Wen, EE Ph. D., (Editor), Wen, Xiaoqing, (Editor)
• Format: eBook
• Language: English
• Published: Amsterdam ; Boston : Elsevier Morgan Kaufmann Publishers, ©2006.
• Series: Morgan Kaufmann series in systems on silicon.
• Subjects: Integrated circuits > Very large scale integration > Testing.; Integrated circuits > Very large scale integration > Design.; elektronické knihy; electronic books
• ISBN: 9780080474793; 9780123705976
• Physical Description: 1 online zdroj (xxx, 777 pages) : illustrations.
• Access: Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty univerzity

This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures. Lecture slides and exercise solutions for all chapters are now available. Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website.